Design and Verification of APB IP Core using Different Verification Methodologies

Abstract

This paper presents the outline of particular type of IP core for APB bus architecture using high level verification methodologies. The AMBA architecture i.e., the Advanced Microcontroller Bus Architecture comprises of specifications related to on-chip interconnects. Also used to manage functional blocks in SoC designs. In this paper, AMBA Advanced Peripheral Bus (APB) has been proposed because of its low bandwidth, low frequency, lower width of bits, low signal complexity and lesser power consumption. AMBA APB can be interfaced with AHB and AXI also. To extend APB transfers, PREADY has been used and to indicate the failure of a transfer, PSLVERR is used. APB DUT has been designed on Cadence NcSim using SV and UVM and its simulations are verified using Cadence SimVision tool.