coxHE: A software-hardware co-design framework for FPGA acceleration of homomorphic computation

Mingqin Han, Yilan Zhu, Qian Lou, Zimeng Zhou, Shanqing Guo, Lei Ju
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引用次数: 10

Abstract

Data privacy becomes a crucial concern in the AI and big data era. Fully homomorphic encryption (FHE) is a promising data privacy protection technique where the entire computation is performed on encrypted data. However, the dramatic increase of the computation workload restrains the usage of FHE for the real-world applications. In this paper, we propose an FPFA accelerator design framework for CKKS-based HE. While the KeySwitch operations are the primary performance bottleneck of FHE computation, we propose a low latency design of KeySwitch module with reduced intra-operation data dependency. Compared with the state-of-the-art FPGA based key-switch implementation that is based on Verilog, the proposed high-level synthesis (HLS) based design reduces the operation latency by 40%. Furthermore, we propose an automated design space exploration framework which generates optimal encryption parameters and accelerators for a given application kernel and the target FPGA device. Experimental results for a set of real HE application kernels on different FPGA devices show that our HLS-based flexible design framework produces substantially better accelerator design compared with a fixed-parameter HE accelerator in terms of security, approximation error, and overall performance.
coxHE:一种FPGA加速同态计算的软硬件协同设计框架
在人工智能和大数据时代,数据隐私成为一个至关重要的问题。完全同态加密(FHE)是一种很有前途的数据隐私保护技术,它在加密数据上进行整个计算。然而,计算工作量的急剧增加限制了FHE在实际应用中的使用。本文提出了一种基于ckks的fpga加速器设计框架。虽然KeySwitch操作是FHE计算的主要性能瓶颈,但我们提出了一种低延迟的KeySwitch模块设计,减少了操作间的数据依赖。与基于Verilog的最先进的基于FPGA的键开关实现相比,所提出的基于高级综合(HLS)的设计将操作延迟降低了40%。此外,我们提出了一个自动化的设计空间探索框架,该框架可以为给定的应用内核和目标FPGA设备生成最佳的加密参数和加速器。在不同FPGA器件上对一组真实HE应用内核进行的实验结果表明,与固定参数HE加速器相比,基于hls的灵活设计框架在安全性、近似误差和整体性能方面都有明显改善。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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