A Trimaran based framework for exploring the design space of VLIW ASIPs with coarse grain functional units

M. Balakrishnan, Anshul Kumar, P. Ienne, Anup Gangwar, Bhuvan Middha
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引用次数: 30

Abstract

It is widely accepted that use of an Application Specific Instruction Set Processor (ASIP) in an embedded system can provide a solution which is much more flexible than ASICs and much more efficient than standard processors in terms of performance and power consumption. However a lack of an acceptable design methodology and supporting tools for ASIPs limits their use even today. We present in this paper a methodology for design space exploration of high performance VLIW ASIPs by modeling Application Specific Functional Units in Trimaran Compiler Infrastructure. To demonstrate the effectiveness of our strategy we consider two important applications FFT and Kalman Filter and perform compute intensive operations in these applications via special Functional Units. The results we obtain are very promising with up to 2/spl times/ speed improvement.
基于三体体的粗粒功能单元VLIW ip设计空间探索框架
人们普遍认为,在嵌入式系统中使用专用指令集处理器(ASIP)可以提供比asic更灵活的解决方案,并且在性能和功耗方面比标准处理器更高效。然而,缺乏可接受的设计方法和支持api的工具,即使在今天也限制了它们的使用。在本文中,我们提出了一种通过在三体船编译器基础设施中建模应用特定功能单元来探索高性能VLIW api设计空间的方法。为了证明我们的策略的有效性,我们考虑了两个重要的应用FFT和卡尔曼滤波器,并通过特殊的功能单元在这些应用中执行计算密集型操作。我们获得的结果非常有希望,速度提高了2/ 1倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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