EDMOS in ultrathin FDSOI: Effect of doping and layout of the drift region

Abstract

We have already demonstrated the fabrication of a Dual-Ground Plane Extended Drain MOSFET with 28nm FDSOI technology. The detrimental consequences of ultrathin SOI film were mitigated by back-biasing the ground planes. In this paper, we explore for the first time the device optimization in 28 nm FDSOI node by doping the drift region. This solution requires additional and dedicated process steps but is free from back-biasing schemes. Following TCAD simulations, devices have been designed and fabricated with UTBB-FDSOI technology. DC measurements indicate that even in ultrathin film (7 nm) the doping of drift region is still a lever for achieving high-voltage (5V) MOSFET with promising performance.