Improvement on coined solder surface on organic substrate for flip chip attach yield improvement

Abstract

This paper describes the improvement on coined solder surface of organic substrate to reduce flip chip assembly defects namely chip misalignment and contact non-wet. Roughening of the eutectic solder surface of the substrate helped to reduce bump misalignment for all packages especially for the tight bump pitch package. Additional pin reflow process for land grid array (LGA) substrates had proven to eliminate contact non wet issue. The surface morphology of the eutectic Sn/Pb bumps in the evaluations is characterized by Scanning Electron Microscopy (SEM), Atomic Force Microscopy (AFM) and X-ray Photoelectron Spectroscopy (XPS). The condition of the solder joint is confirmed by chip pull test, x-ray and electrical test, using open/short test program.