Area-Efficient Scheduling Scheme Based FFT Processor for Various OFDM Systems

Jeong Keun Jang, Ho Keun Kim, M. Sunwoo, O. Gustafsson
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引用次数: 6

Abstract

This paper presents an area-efficient fast Fourier transform (FFT) processor for orthogonal frequency-division multiplexing systems based on multi-path delay commutator architecture. This paper proposes a data scheduling scheme to reduce the number of complex constant multipliers. The proposed mixed-radix multi-path delay commutator FFT processor can support 128-, 256-, and 512-point FFT sizes. The proposed processor was synthesized using the Samsung 65-nm CMOS standard cell library. The proposed processor with eight parallel data paths can achieve a high throughput rate of up to 2.64 GSample/s at 330 MHz.
基于FFT处理器的各种OFDM系统的区域高效调度方案
提出了一种基于多径延时换向器结构的正交频分复用系统快速傅里叶变换(FFT)处理器。提出了一种减少复常数乘子个数的数据调度方案。所提出的混合基数多路径延迟换向器FFT处理器可以支持128点、256点和512点FFT大小。该处理器采用三星65nm CMOS标准单元库合成。该处理器具有8条并行数据路径,在330 MHz时可实现高达2.64 GSample/s的高吞吐率。
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