An Analog CMOS Multiplier Based on the Tomota-Sugiyama-Yamaguchi Principle

Abstract

A CMOS pulse width modulator/pulse amplitude modulator (PWM/PAM) has been realised. The design is based on the Tomota-Sugiyama-Yamaguchi (TSY)-principle. The PWM/PAM has been used to build a four quadrant analog multiplier (4-QAM) with a DC transfer function which depends only on resistor matching and on the value of a reference voltage. The PWM/PAM circuit was fabricated in a 3-¿m CMOS process. Measurements show a small total error (max. 2%) without trimming. A DC-error model, a stability criterion and a bandwidth restriction are derived.