{"title":"A 16-element 4-beam 1GHz-IF 100MHz-bandwidth Interleaved Bit-Stream digital beamformer in 40nm CMOS","authors":"Sunmin Jang, J. Jeong, Rundao Lu, M. Flynn","doi":"10.1109/RFIC.2017.7969033","DOIUrl":null,"url":null,"abstract":"This paper introduces a 16 element, 1GHz IF input, digital beamformer (DBF) that generates 4 independent simultaneous beams, with 100MHz bandwidth. Although DBF has several advantages over analog beamforming, including higher accuracy and multiple beam generation, application of on-chip DBF has been limited due to high power consumption and large die area. The proposed architecture addresses these issues by combining efficient Continuous-Time Band-Pass Delta Sigma Modulators (CTBPDSMs) with Interleaved Bit-Stream Processing (IL-BSP). IL-BSP saves 80% power and 80% area compared to a conventional DSP approach. The overall 16 element array has a measured 58.5dB SNDR and a 59.6dB SNR over a 100MHz bandwidth (11.2dB array gain). Thanks to the IL-BSP approach, the measured beam patterns are near ideal.","PeriodicalId":349922,"journal":{"name":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2017.7969033","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
This paper introduces a 16 element, 1GHz IF input, digital beamformer (DBF) that generates 4 independent simultaneous beams, with 100MHz bandwidth. Although DBF has several advantages over analog beamforming, including higher accuracy and multiple beam generation, application of on-chip DBF has been limited due to high power consumption and large die area. The proposed architecture addresses these issues by combining efficient Continuous-Time Band-Pass Delta Sigma Modulators (CTBPDSMs) with Interleaved Bit-Stream Processing (IL-BSP). IL-BSP saves 80% power and 80% area compared to a conventional DSP approach. The overall 16 element array has a measured 58.5dB SNDR and a 59.6dB SNR over a 100MHz bandwidth (11.2dB array gain). Thanks to the IL-BSP approach, the measured beam patterns are near ideal.