A bottom up approach for placement and compaction of standard modules in VLSI circuit

Dhiraj Sangwan, S. Verma, R. Kumar
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引用次数: 1

Abstract

A bottom up approach for floor planning using the method of composite block formation using Macro Modules is presented. The process involves a recursive technique of bounding rectangle formation after searching the solution space using various number of composite block elements. The algorithm is efficient enough to reduce the dead space in range of 85-99 % and much quicker i.e. from 10 to 100 times faster as compared to standard iterative approaches to carryout floor planning in Electronic Design Automation tools.
一种自底向上的VLSI电路中标准模块的放置和压缩方法
提出了一种基于宏模块的组合块形成方法的自下而上的平面规划方法。该过程涉及到使用不同数量的复合块元素搜索解空间后形成边界矩形的递归技术。该算法足够有效,可以将死区减少到85- 99%的范围内,并且速度更快,即与在电子设计自动化工具中执行地板规划的标准迭代方法相比,速度要快10到100倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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