Dual-Band Concurrent Low Noise LNA

Y. Sawayama, T. Morishita, K. Komoku, N. Itoh
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引用次数: 2

Abstract

This paper presents 1.66/3.26 GHz dual-band concurrent LNA with low NF. Proposed LNA incorporates notch filter matching circuit and mutual induction matching circuit on input and output side to improve NF. The measured $S_{11},S_{22},S_{21}$ and NF were −7.11 dB, −8.41 dB, 12.5 dB, and 1.91 dB at 1.66 GHz and −7.52 dB, −16.0 dB, 9.02 dB and 3.25 dB at 3.26 GHz, respectively. IP1dB exhibits −10.3/−4.7 dBm at 1.66/3.26 GHz. The power consumption is 20.5 mW from a 1.8 V supply voltage. The proposed LNA is designed by using the TSMC-180 nm CMOS process.
双频并发低噪声LNA
本文提出了一种低NF的1.66/3.26 GHz双频并发LNA。本文提出的LNA在输入端和输出端采用陷波滤波匹配电路和互感匹配电路来改善NF。测量到的$S_{11}、S_{22}、S_{21}$和NF在1.66 GHz时分别为- 7.11 dB、- 8.41 dB、12.5 dB和1.91 dB,在3.26 GHz时分别为- 7.52 dB、- 16.0 dB、9.02 dB和3.25 dB。IP1dB在1.66/3.26 GHz时表现为−10.3/−4.7 dBm。在1.8 V电源电压下,功耗为20.5 mW。采用TSMC-180 nm CMOS工艺设计了LNA。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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