Design of Integrated Circuit Hard Defect Location System Based on Thermal Laser Stimulation

Abstract

Locating the fault position through the test system is a crucial part of the failure mechanism analysis of an integrated circuit. This paper presents a scanning and location system to detect integrated circuit hard defects based on Thermal Laser Stimulation (TLS) technology. The system uses a near-infrared laser to irradiate the device by planar scanning to obtain the current/voltage scan variation data of the sample. Then it can show the position of the failure point of the sample based on the abnormal distribution of the number of electrical parameter changes. Scan mode contains fast and slow scan modes for balancing test efficiency and reliability. The current signal during laser irradiation is mainly composed of Optical Beam Induced Resistance Change (OBIRCH) signal and Seebeck Effect (SE) signal. SE signal will act like noise and affect the OBIRCH signal continuously. The system can eliminate the interference of the SE signal by testing the signal separately and then subtracting it from the mixed signal at the test points. The experimental results show that the system can well locate hard defects of integrated circuits.