Khoo Yee Mong, Chua Eng Kee, Lim Teck Guan, Liu Enxiao
{"title":"High frequency characterization of through silicon via structure","authors":"Khoo Yee Mong, Chua Eng Kee, Lim Teck Guan, Liu Enxiao","doi":"10.1109/EPTC.2009.5416491","DOIUrl":null,"url":null,"abstract":"In 3D package, through silicon via (TSV) have been used to achieve smaller size, better performance stacked package. However to effectively utilize TSV for high frequency package design, the high frequency performance of TSV structure has to be precisely characterized. In this work, a method that allows the high frequency extraction of TSV's S-parameter is presented. Extraction is basically done by using a number of line test structures and back-to-back via-line-via structures. This method of extraction does away with the need to perform probing both on top and below the wafer and thus do not require the use of high cost and complex probe station setup.","PeriodicalId":256843,"journal":{"name":"2009 11th Electronics Packaging Technology Conference","volume":"234 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 11th Electronics Packaging Technology Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC.2009.5416491","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
In 3D package, through silicon via (TSV) have been used to achieve smaller size, better performance stacked package. However to effectively utilize TSV for high frequency package design, the high frequency performance of TSV structure has to be precisely characterized. In this work, a method that allows the high frequency extraction of TSV's S-parameter is presented. Extraction is basically done by using a number of line test structures and back-to-back via-line-via structures. This method of extraction does away with the need to perform probing both on top and below the wafer and thus do not require the use of high cost and complex probe station setup.