{"title":"A 1V current-mode filter in 65nm CMOS using capacitance multiplication","authors":"H. Uhrmann, H. Zimmermann","doi":"10.1109/ISSOC.2008.4694858","DOIUrl":null,"url":null,"abstract":"A new capacitance saving method for differential current-mode filter structures is presented. Especially filters with low cut-off frequencies need large capacitors, which comes along with large and expensive chip area. We show the opportunity to save chip-area in a 3rd-order current-mode Butterworth low-pass filter and enlarge the effective capacitance value by 30%. The proposed filter is designed to be in a transmit path in a software defined radio of a mixed-signal system on chip. It is developed and fabricated in low-power 65 nm CMOS and needs an active area of 215 mum times 215 mum. The supply voltage is 1 V at a current consumption of 9.6 mA. The filter reaches a third-order input intercept point of 1.6 mAp and a dynamic range of 73.8 dB at a cut-off frequency of 1 MHz.","PeriodicalId":168022,"journal":{"name":"2008 International Symposium on System-on-Chip","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 International Symposium on System-on-Chip","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSOC.2008.4694858","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
A new capacitance saving method for differential current-mode filter structures is presented. Especially filters with low cut-off frequencies need large capacitors, which comes along with large and expensive chip area. We show the opportunity to save chip-area in a 3rd-order current-mode Butterworth low-pass filter and enlarge the effective capacitance value by 30%. The proposed filter is designed to be in a transmit path in a software defined radio of a mixed-signal system on chip. It is developed and fabricated in low-power 65 nm CMOS and needs an active area of 215 mum times 215 mum. The supply voltage is 1 V at a current consumption of 9.6 mA. The filter reaches a third-order input intercept point of 1.6 mAp and a dynamic range of 73.8 dB at a cut-off frequency of 1 MHz.