Design of Operational Amplifier with Low Power Consumption in 0.35 μm Technology

Abstract

This article covers the topic of designing the operational amplifiers, it describes the design of a compact, low power amplifier utilizing 0.35 μm CMOS technology. The main motivation behind this work was the existing need at the Technical University of Lodz for compact device that could be easily employed in larger designs. This article describes best topology for each stage in terms of meeting the design goals. The final circuit is a unique combination of low power topologies with solutions from large gain, high power amplifiers. This was done to achieve largest possible value of amplifier's gain within total power consumption constraint. The device performance was verified positively both at the schematic and at the layout level.