Design of fault-tolerant neuromorphic computing systems

Abstract

Neuromorphic computing is rapidly becoming mainstream, and Resistive Random Access Memory (RRAM) and RRAM-based computing systems (RCS) provide a promising hardware implementation of neuromorphic computing. This emerging computing system helps us to realize vector-matrix multiplications in a time complexity of 0(1), and it improves energy efficiency dramatically. However, due to the immature fabrication process, RCS is susceptible to defects; the resulting errors lead to a significant accuracy drop in neuromorphic computing applications. In order to take advantage of RCS in practical applications, fault-tolerant design is necessary. We present a survey of fault-tolerant designs for RRAM-based neuromorphic computing systems. We first describe RRAM-based crossbars and their role in neuromorphic computing systems. Following this, we classify fault models into different categories, and review the test solutions. Subsequently, the framework of fault-tolerant design for RCS is presented, which contains an online testing phase and a fault-tolerant training phase. The techniques proposed for these two phases are classified and explained to highlight their similarities and differences. The methods reviewed in this survey represent recent trends in fault-tolerant designs of RCS, and are expected motivate further research in this field.