Optimization of LDMOS-SCR Device For ESD Protection Based On 0.5 μm CMOS Process

Abstract

The LDMOS-SCR(lateral double diffused MOSFET Silicon controlled rectifiers) device structure is fabricated based on a standard CMOS(Complementary Metal Oxide Semiconductor) process, the device is used for unidirectional ESD protection of single photon detectors. According to the principle of equivalent circuit and TCAD(Technology Computer Aided Design) simulation to predict the ESD behavior of the device, and use the transmission line pulse(TLP) for device testing. The results show that the trigger voltage of the LDMOS-SCR device is 19V, the sustain voltage is $3\mathrm {V} \sim 7\mathrm {V}$, and the failure current is 7A $\sim 11\mathrm {A}$. In this paper, the partial dimensions of the device are changed, and the ESD indicators of LDMOS-SCR under different sizes are obtained and discussed and analyzed.