A 55μW 93.1dB-DR 20kHz-BW single-bit CT ΔΣ modulator with negative R-assisted integrator achieving 178.7dB FoM in 65nm CMOS

Moonhyung Jang, Sangwoo Lee, Youngcheol Chae
{"title":"A 55μW 93.1dB-DR 20kHz-BW single-bit CT ΔΣ modulator with negative R-assisted integrator achieving 178.7dB FoM in 65nm CMOS","authors":"Moonhyung Jang, Sangwoo Lee, Youngcheol Chae","doi":"10.23919/VLSIC.2017.8008540","DOIUrl":null,"url":null,"abstract":"This paper presents a 3rd order single-bit CT ΔΣ modulator with active-RC integrators using negative-R assistant at virtual ground, which mitigates opamp's requirements including the thermal noise and linearity leading to a drastic power-saving. Fabricated in a 65nm CMOS process, the modulator occupies area of 0.27mm2. It achieves 100.5dB SFDR and 93.1dB DR in 20kHz BW, while consuming only 55μW from a 1.2V supply. This results in Schreier FoM of 178.7dB and Walden FoM of 63.1fJ/step.","PeriodicalId":176340,"journal":{"name":"2017 Symposium on VLSI Circuits","volume":"53 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/VLSIC.2017.8008540","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9

Abstract

This paper presents a 3rd order single-bit CT ΔΣ modulator with active-RC integrators using negative-R assistant at virtual ground, which mitigates opamp's requirements including the thermal noise and linearity leading to a drastic power-saving. Fabricated in a 65nm CMOS process, the modulator occupies area of 0.27mm2. It achieves 100.5dB SFDR and 93.1dB DR in 20kHz BW, while consuming only 55μW from a 1.2V supply. This results in Schreier FoM of 178.7dB and Walden FoM of 63.1fJ/step.
55μW 93.1dB-DR 20kHz-BW单比特CT ΔΣ调制器,带负r辅助积分器,在65nm CMOS中实现178.7dB FoM
本文提出了一种三阶单比特CT ΔΣ调制器,其有源rc积分器在虚拟地使用负r辅助,从而降低了运放的要求,包括热噪声和线性度,从而大大节省了功耗。该调制器采用65nm CMOS工艺制造,面积为0.27mm2。它在20kHz BW下可实现100.5dB的SFDR和93.1dB的DR,而功耗仅为55μW。Schreier FoM为178.7dB, Walden FoM为63.1fJ/step。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信