Novel low capacitance VDMOS device for switching and RF power amplification

Abstract

In this paper the development of a novel low voltage PLANAR gate VDMOS device and process is presented. The device architecture was developed to reduce output capacitance while maintaining low on-state resistance for use in power switching applications and RF power amplification. The 80V device employs charge-balance techniques to minimize on-resistance and also considers how to reduce output capacitance to reduce switching loss.