{"title":"Cobalt silicide nanocrystal memory","authors":"D. Zhao, Yan Zhu, Ruigang Li, Jianlin Liu","doi":"10.1109/DRC.2005.1553077","DOIUrl":null,"url":null,"abstract":"Nonvolatile Si nanocrystal memory is fast approaching commercialization. In order to extend the scaling limits, many kinds of nanocrystals or device architectures were used to replace Si nanocrystals. In this work, we report for the first time the experimental demonstration of a nonvolatile memory device using cobalt silicide nanocrystals as floating gates. The band diagram is shown in Fig. 1 (a). There are at least two advantage of using cobalt silicide nanocrystal over Si nanocrystal: first, cobalt silicide is a metallic material and its band edges for conduction and valence bands are all lower than those of the Si [1], which helps both electron and hole retentions. Second, cobalt silicide can be grown on Si nanocrystal plus a rapid thermal annealing (RTP) [2]. The self-aligned silicide remains while the unreacted metal cobalt is removed in selective etchant. The device fabrication begins with a thermal oxide growth at 1000 °C for 4.5 minutes on a 4-inch n-type Si substrate, which leads to a tunneling oxide thickness ofabout 3 nm. Si nanocrystals were formed in a LPCVD furnace followed by a deposition of ultra thin Co metal in an e-beam evaporator. RTP is then performed in nitrogen to form silicide. The unreacted cobalt metal was removed in a selective. The control oxide (40 nm) was grown in another LPCVD furnace. A MOS capacitor is finally obtained after depositing and patterning the aluminum electrodes on frond and back sides of the sample. An SEM image of the CoSi2 nanocrystals on SiO2 is shown in Fig.1 (b).","PeriodicalId":306160,"journal":{"name":"63rd Device Research Conference Digest, 2005. DRC '05.","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"63rd Device Research Conference Digest, 2005. DRC '05.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.2005.1553077","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Nonvolatile Si nanocrystal memory is fast approaching commercialization. In order to extend the scaling limits, many kinds of nanocrystals or device architectures were used to replace Si nanocrystals. In this work, we report for the first time the experimental demonstration of a nonvolatile memory device using cobalt silicide nanocrystals as floating gates. The band diagram is shown in Fig. 1 (a). There are at least two advantage of using cobalt silicide nanocrystal over Si nanocrystal: first, cobalt silicide is a metallic material and its band edges for conduction and valence bands are all lower than those of the Si [1], which helps both electron and hole retentions. Second, cobalt silicide can be grown on Si nanocrystal plus a rapid thermal annealing (RTP) [2]. The self-aligned silicide remains while the unreacted metal cobalt is removed in selective etchant. The device fabrication begins with a thermal oxide growth at 1000 °C for 4.5 minutes on a 4-inch n-type Si substrate, which leads to a tunneling oxide thickness ofabout 3 nm. Si nanocrystals were formed in a LPCVD furnace followed by a deposition of ultra thin Co metal in an e-beam evaporator. RTP is then performed in nitrogen to form silicide. The unreacted cobalt metal was removed in a selective. The control oxide (40 nm) was grown in another LPCVD furnace. A MOS capacitor is finally obtained after depositing and patterning the aluminum electrodes on frond and back sides of the sample. An SEM image of the CoSi2 nanocrystals on SiO2 is shown in Fig.1 (b).