Algorithmic ADC for use in ASIC design

K. Deevy
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Abstract

An algorithmic analog to digital converter is described which combines a fast conversion time of less than 300 ns with a small circuit area of 0.8 mm/sup 2/. The circuit operates from a+5 V power supply and is ideally suited for use as a general purpose cell in analogue and mixed signal ASIC design. The ADC operates in current mode and an accurate current sensing technique allows the comparators to operate very quickly even in the presence of small signal differences. The current mode approach has the advantage of small signal voltage swings, low node capacitance and therefore fast operation. The resolution of the converter is 8-bits as this will satisfy the requirements of many applications including digital mobile radio and disk drive servo control chips. Results are presented for a prototype chip fabricated on a 2- mu m BiCMOS process.<>
用于ASIC设计的算法ADC
本文介绍了一种模数转换算法,它具有小于300 ns的快速转换时间和0.8 mm/sup /的小电路面积。该电路由+5 V电源供电,非常适合用作模拟和混合信号ASIC设计中的通用单元。ADC在电流模式下工作,精确的电流传感技术使比较器即使在存在小信号差异的情况下也能非常快速地工作。电流模式方法具有信号电压波动小、节点电容低、运算速度快等优点。转换器的分辨率为8位,因为这将满足许多应用的要求,包括数字移动无线电和磁盘驱动器伺服控制芯片。介绍了在2 μ m BiCMOS工艺上制作的原型芯片的结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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