A 7.9-14.3GHz -243.3dB FoMT Sub-Sampling PLL with Transformer-Based Dual-Mode VCO in 40nm CMOS

Yizhuo Wang, T. Zou, Bowen Chen, Shujiang Ji, Chaoxuan Zhang, N. Yan
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引用次数: 3

Abstract

The rapid development of modern wireless communication systems call for high quality frequency synthesizers. Microwave and 5G mm-wave communication require low jitter and wide frequency range synthesizers. This paper presents a 135fsrms jitter, 7.9-14.3GHz PLL integrated with a wide-band dual-mode VCO, as shown in Fig.1. Subsampling technique [1] is used to achieve ultra-low in-band phase noise. The dual-mode VCO is based on an “8”-shaped coil transformer and the resonant tank has balanced impedance at each mode. Compared with previous multi-mode VCOs, the proposed VCO shows identical performance at the two modes and PLL achieves low jitter across all frequency bands.
基于变压器的40nm CMOS双模压控振荡器7.9-14.3GHz -243.3dB fmt子采样锁相环
现代无线通信系统的快速发展需要高质量的频率合成器。微波和5G毫米波通信需要低抖动和宽频率范围的合成器。本文设计了一个135fsrms抖动、7.9-14.3GHz的锁相环,并集成了宽带双模压控振荡器,如图1所示。采用[1]次采样技术实现超低带内相位噪声。双模VCO基于“8”形线圈变压器,谐振槽在每个模式下都具有平衡阻抗。与以往的多模压控振荡器相比,所提出的压控振荡器在两种模式下都具有相同的性能,并且锁相环在所有频段都实现了低抖动。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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