{"title":"Time slot specification based approach to analog fault diagnosis using built-in current sensors and test point insertion","authors":"S. Upadhyaya, Jae Min Lee, Padmanabhan Nair","doi":"10.1109/ATS.2002.1181749","DOIUrl":null,"url":null,"abstract":"Testing and diagnosis of analog circuits continues to be a hard task for test engineers and efficient test methodologies to tackle these problems are needed. This paper proposes a novel analog test method using time slot specification (TSS) based built-in current sensors. A technique for location of a fault site and fault type, based on TSS, is presented. The proposed built-in current sense and decision module (BSDM), in association with TSS analysis, has high testability and good fault coverage, and a capability to diagnose catastrophic faults and parametric faults in analog circuits. The digital output of the BSDM can be easily combined with built-in digital test modules for mixed-signal IC testing. The general heuristics for test point placement are also described.","PeriodicalId":199542,"journal":{"name":"Proceedings of the 11th Asian Test Symposium, 2002. (ATS '02).","volume":"94 3","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 11th Asian Test Symposium, 2002. (ATS '02).","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.2002.1181749","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Testing and diagnosis of analog circuits continues to be a hard task for test engineers and efficient test methodologies to tackle these problems are needed. This paper proposes a novel analog test method using time slot specification (TSS) based built-in current sensors. A technique for location of a fault site and fault type, based on TSS, is presented. The proposed built-in current sense and decision module (BSDM), in association with TSS analysis, has high testability and good fault coverage, and a capability to diagnose catastrophic faults and parametric faults in analog circuits. The digital output of the BSDM can be easily combined with built-in digital test modules for mixed-signal IC testing. The general heuristics for test point placement are also described.