NMOS/SiGe Resonant Interband Tunneling Diode Static Random Access Memory

Abstract

Tunneling-based static random access memory(SRAM)has been sought as a viable solution for a lowpower and high speed embedded memory application. The first cell design, proposed by Goto et al. [1],consists oftwotunnel diodes connected in series, oneacting as the drive andthe other as the load as showninFig. 1. This configuration allows for bistable operation at a particular range ofsupply voltages (VDD). Theinformation is stored at the sense node, whichcanbe altered by modulating current into the node via a FET.Byinjecting a current into the sense node, the cell is forced to latch to a high state as illustrated in Fig l(b).During write low operation, the FETis used to discharge the cell, pulling the sense node potential to a lowstate as depicted in Fig l(c). The demonstration ofthis type of bistable latch has been done in the Ill-Vmaterial system, showing avery promisingperformance bothin speedandpowerdissipation [2]. Morimotoetal. realizedthe systemin Si