Analytical threshold voltage model for short channel n/sup +/-p/sup +/ double-gate SOI MOSFETs

Abstract

Previously, we proposed n/sup +/-p/sup +/ double-gate SOI MOSFETs, and fabricated this device, and demonstrated high-speed, low-power performance with a gate length L/sub G/ of 0.2 /spl mu/m. In this paper, we have derived a threshold voltage model V/sub th/ for short channel devices to predict how far this device can be scaled. Using this model, which agrees with numerical data, we evaluated V/sub th/ lowering /spl Delta/V/sub th/ with decreasing the gate length L/sub G/, and showed that we can design a 0.05 /spl mu/m-L/sub G/ device with /spl Delta/V/sub th/ of 25 mV and an S-swing of 65 mV/decade.