Design of a CMOS Current-mode Squaring Circuit for Training Analog Neural Networks

Abstract

We propose a new current mode CMOS squaring circuit which directly yields the square term. The proposed squaring circuit was designed in a standard with 0.18 µm CMOS technology. The designed chip occupies a chip area of 408µm × 197µm and consumes a power of 3.6mW. The proposed squaring circuit can be used in current mode applications as in analog neurons.