From SI, PI, EMI Design, Verification, to Package, Board, and Channel Intellectual Property

N. Chen
{"title":"From SI, PI, EMI Design, Verification, to Package, Board, and Channel Intellectual Property","authors":"N. Chen","doi":"10.1109/EPTC56328.2022.10013193","DOIUrl":null,"url":null,"abstract":"The problems of signal integrity (SI), power integrity (PI), and electromagnetic interference (EMI) are always discovered in the high-speed digital system. Cost-effective channel designs, such as leadframe packages, low layer count boards, and the PCB with single-sided component placement (SSCP), are often adopted in the consumer electronics but undergo the significant SI, PI, or EMI issues. Some innovative designs were proposed to improve the cheap channels based on the concept of impedance control and ideal current return path. Those designs were also verified using chip-package-board co-simulation with chip netlists and channel S-parameters. Furthermore, those verified designs were classified into different types of intellectual property corresponding to the scopes of SI, PI, and EMI, and can be reused for next system designs without repeat of the same mistakes.","PeriodicalId":163034,"journal":{"name":"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)","volume":"16 7","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC56328.2022.10013193","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

The problems of signal integrity (SI), power integrity (PI), and electromagnetic interference (EMI) are always discovered in the high-speed digital system. Cost-effective channel designs, such as leadframe packages, low layer count boards, and the PCB with single-sided component placement (SSCP), are often adopted in the consumer electronics but undergo the significant SI, PI, or EMI issues. Some innovative designs were proposed to improve the cheap channels based on the concept of impedance control and ideal current return path. Those designs were also verified using chip-package-board co-simulation with chip netlists and channel S-parameters. Furthermore, those verified designs were classified into different types of intellectual property corresponding to the scopes of SI, PI, and EMI, and can be reused for next system designs without repeat of the same mistakes.
从SI, PI, EMI设计,验证到封装,电路板和通道知识产权
在高速数字系统中,信号完整性(SI)、功率完整性(PI)和电磁干扰(EMI)等问题一直存在。具有成本效益的通道设计,如引线框架封装、低层计数板和单面元件放置(SSCP)的PCB,通常在消费电子产品中采用,但存在显著的SI、PI或EMI问题。基于阻抗控制和理想电流返回路径的概念,提出了一些改进廉价通道的创新设计。这些设计还通过芯片网络表和通道s参数的芯片封装板联合仿真进行了验证。此外,这些经过验证的设计被归类为不同类型的知识产权,对应于SI, PI和EMI的范围,并且可以在下一次系统设计中重复使用,而不会重复相同的错误。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信