Spontaneous recovery of positive gate bias stressed power VDMOSFETs

N. Stojadinovic, I. Manic, S. Djoric-Veljkovic, V. Davidovic, D. Danković, S. Golubovic, S. Dimitrijev
{"title":"Spontaneous recovery of positive gate bias stressed power VDMOSFETs","authors":"N. Stojadinovic, I. Manic, S. Djoric-Veljkovic, V. Davidovic, D. Danković, S. Golubovic, S. Dimitrijev","doi":"10.1109/MIEL.2002.1003358","DOIUrl":null,"url":null,"abstract":"Spontaneous recovery of threshold voltage and channel carrier mobility in positive gate bias stressed power VDMOSFETs and the underlying changes in gate oxide-trapped charge and interface trap densities are presented and analysed. Electron tunneling from neutral oxide traps associated with trivalent silicon /spl equiv/Si/sub o//sup ./ defects into the oxide conduction band is proposed as the main mechanism responsible for stress-induced buildup of positive oxide-trapped charge. Subsequent hole tunneling from the charged oxide traps /spl equiv/Si/sub o//sup +/ to interface-trap precursors /spl equiv/Si/sub s/-H is proposed as the dominant mechanism responsible for the interface trap buildup. A chain of mechanisms related to a presence of hydrogen species is proposed in order to explain changes of oxide-trapped charge and interface trap densities during the spontaneous recovery. Interface trap /spl equiv/Si/sub s//sup ./ passivation due to their reaction with hydrogen atoms is proposed as a main mechanism responsible for a decrease of interface trap density. Hydrogen molecule cracking at charged oxide traps /spl equiv/Si/sub o//sup +/, which leads to their neutralization, is proposed as the dominant mechanism responsible for a decrease of oxide-trapped charge density.","PeriodicalId":221518,"journal":{"name":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MIEL.2002.1003358","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

Spontaneous recovery of threshold voltage and channel carrier mobility in positive gate bias stressed power VDMOSFETs and the underlying changes in gate oxide-trapped charge and interface trap densities are presented and analysed. Electron tunneling from neutral oxide traps associated with trivalent silicon /spl equiv/Si/sub o//sup ./ defects into the oxide conduction band is proposed as the main mechanism responsible for stress-induced buildup of positive oxide-trapped charge. Subsequent hole tunneling from the charged oxide traps /spl equiv/Si/sub o//sup +/ to interface-trap precursors /spl equiv/Si/sub s/-H is proposed as the dominant mechanism responsible for the interface trap buildup. A chain of mechanisms related to a presence of hydrogen species is proposed in order to explain changes of oxide-trapped charge and interface trap densities during the spontaneous recovery. Interface trap /spl equiv/Si/sub s//sup ./ passivation due to their reaction with hydrogen atoms is proposed as a main mechanism responsible for a decrease of interface trap density. Hydrogen molecule cracking at charged oxide traps /spl equiv/Si/sub o//sup +/, which leads to their neutralization, is proposed as the dominant mechanism responsible for a decrease of oxide-trapped charge density.
正栅极偏置应力功率vdmosfet的自发恢复
提出并分析了正栅极偏置应力功率vdmosfet中阈值电压和沟道载流子迁移率的自发恢复,以及栅极氧化捕获电荷和界面捕获密度的潜在变化。电子从与三价硅/spl当量/Si/sub / o/ sup /缺陷相关的中性氧化物陷阱中隧穿到氧化物导带中,被认为是导致应力诱导的正氧化物陷阱电荷积累的主要机制。从带电氧化物陷阱/spl equiv/Si/sub o//sup +/到界面陷阱前体/spl equiv/Si/sub s/-H的后续空穴隧穿被认为是导致界面陷阱形成的主要机制。为了解释自发恢复过程中氧化捕获电荷和界面捕获密度的变化,提出了与氢存在有关的一系列机制。界面阱/spl equiv/Si/sub /s /sup ./钝化是导致界面阱密度降低的主要机制。氢分子在带电荷的氧化阱/spl equiv/Si/sub / o/ sup +/处发生裂解,导致其中和,被认为是导致氧化阱电荷密度降低的主要机制。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信