A 16-Core RISC Microprocessor with Network Extensions

2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers Pub Date : 2006-09-18 DOI:10.1109/ISSCC.2006.1696061

V. Yalala, D. Brasili, D. Carlson, A. Hughes, Anil K. Jain, T. Kiszely, Kolar Kodandapani, A. Varadharajan, T. Xanthopoulos

引用次数: 16

Abstract

A multi-core RISC processor is integrated with a number of security engines and network function accelerators creating a high-performance power-efficient SoC. It contains 180M transistors, dissipates 25W at 600MHz and is fabricated in a 1.2V 0.13mum CMOS process with 9 layers of copper interconnect using FSG dielectric and C4 bumps

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具有网络扩展的16核RISC微处理器

多核RISC处理器集成了多个安全引擎和网络功能加速器，创建了高性能的低功耗SoC。它包含180M晶体管，在600MHz时耗散25W，采用1.2V 0.13mum CMOS工艺制造，使用FSG介电介质和C4凸点进行9层铜互连

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers

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