精确的逻辑级功率仿真使用故障滤波和估计

W. Tsai, C. Shung, D.C. Wang
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引用次数: 6

摘要

当功耗是芯片设计过程中主要关注的问题时,需要一个更快、更准确的功耗估计工具。逻辑级模拟器是估计芯片设计功耗的一个很好的选择。在本文中,我们尝试使用故障滤波和估计技术来提高逻辑电平模拟器的精度。我们使用逻辑电平模拟器来过滤一些故障并估计故障功率。我们使用过渡的斜率和两个连续过渡的时间间隔来确定这些过渡是部分故障还是完全过渡。我们估计了每个转移事件的转移功率,并对它们求和。参考Spice仿真,功率仿真误差从35.8%降低到7.9%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Accurate logic-level power simulation using glitch filtering and estimation
A power estimation tool is required to be faster and more accurate when the power consumption is the chief concern during chip design. A logic-level simulator is a good choice for estimating the power consumption of a chip design. In this paper we attempt to improve the accuracy of a logic-level simulator using glitch filtering and estimation techniques. We use the logic-level simulator to filter some glitches and estimate the glitch power. We use slope of transition and the time interval of two consecutive transitions to decide whether these transitions are partial glitches or full transitions. We estimate the transition power of each transition event and summed them. The power simulation error is reduced from 35.8% to 7.9% referring to the Spice simulation.
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