Wanting Liu, Xiqin Tang, Yang Li, Zhijun Wang, Fei Xia, Shushan Qiao, Yumei Zhou, D. Shang
{"title":"一个快速的二进制补语发生器","authors":"Wanting Liu, Xiqin Tang, Yang Li, Zhijun Wang, Fei Xia, Shushan Qiao, Yumei Zhou, D. Shang","doi":"10.1109/ICICM54364.2021.9660329","DOIUrl":null,"url":null,"abstract":"The two’s complement of a number is defined as the one’s complement of that number plus 1, while the addition operation tends to consume more resources and power. This paper proposes a novel two’s complement generator without involving addition, which can solve this problem. The results show the proposed solution can simplify design, improve performance and reduce power compared with traditional adder-based solutions. In addition, the new design is based on regular cells and fully modular, which leads to good scalability and straightforward assembly into large systems. Furthermore, the proposed design supports multi-functions, and it is also suited for use in arithmetic units, including adders, multipliers to speed up two’s complement operations.","PeriodicalId":6693,"journal":{"name":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"19 2","pages":"328-331"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Fast Two’s Complement Generator\",\"authors\":\"Wanting Liu, Xiqin Tang, Yang Li, Zhijun Wang, Fei Xia, Shushan Qiao, Yumei Zhou, D. Shang\",\"doi\":\"10.1109/ICICM54364.2021.9660329\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The two’s complement of a number is defined as the one’s complement of that number plus 1, while the addition operation tends to consume more resources and power. This paper proposes a novel two’s complement generator without involving addition, which can solve this problem. The results show the proposed solution can simplify design, improve performance and reduce power compared with traditional adder-based solutions. In addition, the new design is based on regular cells and fully modular, which leads to good scalability and straightforward assembly into large systems. Furthermore, the proposed design supports multi-functions, and it is also suited for use in arithmetic units, including adders, multipliers to speed up two’s complement operations.\",\"PeriodicalId\":6693,\"journal\":{\"name\":\"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)\",\"volume\":\"19 2\",\"pages\":\"328-331\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-10-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICM54364.2021.9660329\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICM54364.2021.9660329","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The two’s complement of a number is defined as the one’s complement of that number plus 1, while the addition operation tends to consume more resources and power. This paper proposes a novel two’s complement generator without involving addition, which can solve this problem. The results show the proposed solution can simplify design, improve performance and reduce power compared with traditional adder-based solutions. In addition, the new design is based on regular cells and fully modular, which leads to good scalability and straightforward assembly into large systems. Furthermore, the proposed design supports multi-functions, and it is also suited for use in arithmetic units, including adders, multipliers to speed up two’s complement operations.