A Simple Monitor for Tracking NBTI in Integrated Systems

NBTI is one of the primary concerns for long-term reliability in systems using deep submicron technologies. In this paper, we propose a simple on-chip sensor architecture that monitors degradation due to NBTI through pseudo-static measurements of the relative shift in threshold voltage. A representative pMOSFET is stressed to intentionally induce NBTI and then compared to a reference pMOSFET that is ideally unaffected by ageing. The proposed architecture can be used to measure degradation in multiple devices that are stressed under a variety of conditions with minimal additional overhead. The use of pseudo-static measurements reduces the measurement error introduced by the ageing of devices in supporting circuitry, and it allows for measurements to be completed in relatively few clock cycles.