一种64Gb/s 2.29pJ/b的PAM-4 VCSEL发射机，采用65nm CMOS，具有3分路非对称FFE

2019 Symposium on VLSI Circuits Pub Date : 2019-06-01 DOI:10.23919/VLSIC.2019.8777952

Jeongho Hwang, Hong-Seok Choi, H. Do, Gyu-Seob Jeong, Daehyun Koh, Kwanseo Park, Sungwoo Kim, D. Jeong

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引用次数: 6

摘要

本文提出了一种基于VCSEL的64Gb/s, 2.29pJ/b的PAM-4光发射器(TX)。为了提高功率效率，TX采用了由正交时钟发生器和4:1 MUX组成的四分之一速率架构。通过采用非对称推拉FFE，可以实现基于VCSEL的高速PAM-4信令。它采用65nm CMOS技术制造，占据0.278mm2的有效面积。

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A 64Gb/s 2.29pJ/b PAM-4 VCSEL Transmitter With 3-Tap Asymmetric FFE in 65nm CMOS

This paper presents a 64Gb/s, 2.29pJ/b PAM-4 optical transmitter (TX) utilizing a VCSEL. To improve the power efficiency, the TX adopts a quarter-rate architecture consisting of a quadrature clock generator and a 4:1 MUX. By employing an asymmetric push-pull FFE, high-speed PAM-4 signaling based on a VCSEL can be achieved. It is fabricated in a 65nm CMOS technology, occupying an active area of 0.278mm2.

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2019 Symposium on VLSI Circuits

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