{"title":"用分立二极管精确测定SiC MOSFET结构热阻的另一种方法","authors":"A. Vass-Várnai, Youngmin Cho, G. Farkas, M. Rencz","doi":"10.23919/IPEC.2018.8507995","DOIUrl":null,"url":null,"abstract":"To determine the thermal properties of power semiconductor devices and structures, the JEDEC JESD 51-1 static, electrical test method is a well-known and industry-wide accepted technique. The approach provides accurate and repeatable results in case of silicon based transistors in all cases. For certain compound semiconductor components, such as SiC MOSFET-s and GaN HEMT structures, the application of the electrical test method becomes in some cases challenging. If traditional test setups are used, in the unit step response function, due to parasitic effects, an electric signal may superpose on the thermal signal of interest, making it hard or even impossible to analyze the test results. If the structure has a physical diode as well, it can be used to understand the thermal properties of the package and its layers. This information can be applied in another step to gather the thermal properties from die transistors’ point of view as well, without measuring it. In this article we show a combined measurement and simulation based method, which allows the accurate thermal characterization of such components, even in cases when other approaches may fail.","PeriodicalId":6610,"journal":{"name":"2018 International Power Electronics Conference (IPEC-Niigata 2018 -ECCE Asia)","volume":"1 1","pages":"137-141"},"PeriodicalIF":0.0000,"publicationDate":"2018-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"An Alternative Method to Accurately Determine the Thermal Resistance of SiC MOSFET Structures with Discrete Diodes\",\"authors\":\"A. Vass-Várnai, Youngmin Cho, G. Farkas, M. Rencz\",\"doi\":\"10.23919/IPEC.2018.8507995\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"To determine the thermal properties of power semiconductor devices and structures, the JEDEC JESD 51-1 static, electrical test method is a well-known and industry-wide accepted technique. The approach provides accurate and repeatable results in case of silicon based transistors in all cases. For certain compound semiconductor components, such as SiC MOSFET-s and GaN HEMT structures, the application of the electrical test method becomes in some cases challenging. If traditional test setups are used, in the unit step response function, due to parasitic effects, an electric signal may superpose on the thermal signal of interest, making it hard or even impossible to analyze the test results. If the structure has a physical diode as well, it can be used to understand the thermal properties of the package and its layers. This information can be applied in another step to gather the thermal properties from die transistors’ point of view as well, without measuring it. In this article we show a combined measurement and simulation based method, which allows the accurate thermal characterization of such components, even in cases when other approaches may fail.\",\"PeriodicalId\":6610,\"journal\":{\"name\":\"2018 International Power Electronics Conference (IPEC-Niigata 2018 -ECCE Asia)\",\"volume\":\"1 1\",\"pages\":\"137-141\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-05-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 International Power Electronics Conference (IPEC-Niigata 2018 -ECCE Asia)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/IPEC.2018.8507995\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Power Electronics Conference (IPEC-Niigata 2018 -ECCE Asia)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/IPEC.2018.8507995","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An Alternative Method to Accurately Determine the Thermal Resistance of SiC MOSFET Structures with Discrete Diodes
To determine the thermal properties of power semiconductor devices and structures, the JEDEC JESD 51-1 static, electrical test method is a well-known and industry-wide accepted technique. The approach provides accurate and repeatable results in case of silicon based transistors in all cases. For certain compound semiconductor components, such as SiC MOSFET-s and GaN HEMT structures, the application of the electrical test method becomes in some cases challenging. If traditional test setups are used, in the unit step response function, due to parasitic effects, an electric signal may superpose on the thermal signal of interest, making it hard or even impossible to analyze the test results. If the structure has a physical diode as well, it can be used to understand the thermal properties of the package and its layers. This information can be applied in another step to gather the thermal properties from die transistors’ point of view as well, without measuring it. In this article we show a combined measurement and simulation based method, which allows the accurate thermal characterization of such components, even in cases when other approaches may fail.