用于软件定义无线电的40nm CMOS 100MHz - 2GHz无线接收器

2011 IEEE International Conference of Electron Devices and Solid-State Circuits Pub Date : 2011-12-29 DOI:10.1109/EDSSC.2011.6117693

Y. Peng, Y. Liu, F. Yang, X. L. Zhang, X. P. Yu, Z. Lu, W. M. Lim, C. H. Hu

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引用次数: 4

摘要

软件定义无线电(SDR)作为移动通信标准中实现多模终端的解决方案之一，受到了广泛的研究。采用40纳米CMOS工艺设计了SDR宽带无线接收机，覆盖频率范围为100MHz ~ 2GHz。宽带射频前端包括低噪声放大器(LNA)、混频器、中频放大器(IF AMP)和可变增益放大器(VGA)。设计的重点在于宽带LNA。带1.1 v电源的宽带无电感LNA是一个两级放大器，可以在100MHz到2GHz范围内工作。LNA的噪声系数(NF)为2.2-2.4 dB，工作在主动模式和被动模式下分别可获得24-12 dB和0 -•12 dB的增益。整个系统的NF为3.2-3.5 dB，功耗为5.02mw。

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A 100MHz — 2GHz wireless receiver in 40-nm CMOS for software-defined radio

Software-defined radio (SDR), one of solutions to realize multi-mode terminal for mobile communication standards, has attracted intensive studies. A wideband wireless receiver is designed in a 40-nm CMOS process for SDR, which can cover the frequency range from 100MHz to 2GHz. The wideband RF front-end includes a low noise amplifier (LNA), a mixer, intermediate frequency amplifier (IF AMP) and a variable gain amplifier (VGA). The focal point of the design lies in the wideband LNA. The wideband inductorless LNA with 1.1-V supply is a two-stage amplifier that can operates from 100MHz to 2GHz. The noise figure (NF) of the LNA is 2.2–2.4 dB while it can achieve gains of 24-12 dB and 0– •12 dB when working under the active mode and passive mode, respectively. The whole system provides a NF of 3.2–3.5 dB with 5.02mw power consumption.

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2011 IEEE International Conference of Electron Devices and Solid-State Circuits

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