{"title":"一种基于开关串并联直流电源的多电平逆变器广义拓扑(研究笔记)","authors":"G. Sridhar, P. Satishkumar, M. Sushama","doi":"10.11591/IJEECS.V4.I1.PP41-51","DOIUrl":null,"url":null,"abstract":"This paper presents a novel topology of Single-phase multilevel inverter for low and high power applications. It consists of polarity (Level) generation circuit and H Bridge to generate both positive and negative polarities. The proposed topology can produce more output voltage levels by switching dc voltage sources in series and parallel. The proposed topology utilizes minimum number of power electronic devices which leads to the reduction of cost, size, and weight low and consumes low power which improves the efficiency. Switching pulses are generated using Phase disposition (PD) pulse width modulation technique. Finally the effectiveness of the proposed topology is verified using MATLAB/SIMULINK software tool. 7level asymmetrical multilevel inverter prototype hardware is prepared to support the proposed topology to verify the effectiveness and its validity.","PeriodicalId":14066,"journal":{"name":"International Journal of Engineering - Transactions C: Aspects","volume":"40 1","pages":"851-858"},"PeriodicalIF":0.0000,"publicationDate":"2016-11-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"A Novel Generalized Topology for Multi-level Inverter with Switched Series-parallel DC Sources (RESEARCH NOTE)\",\"authors\":\"G. Sridhar, P. Satishkumar, M. Sushama\",\"doi\":\"10.11591/IJEECS.V4.I1.PP41-51\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a novel topology of Single-phase multilevel inverter for low and high power applications. It consists of polarity (Level) generation circuit and H Bridge to generate both positive and negative polarities. The proposed topology can produce more output voltage levels by switching dc voltage sources in series and parallel. The proposed topology utilizes minimum number of power electronic devices which leads to the reduction of cost, size, and weight low and consumes low power which improves the efficiency. Switching pulses are generated using Phase disposition (PD) pulse width modulation technique. Finally the effectiveness of the proposed topology is verified using MATLAB/SIMULINK software tool. 7level asymmetrical multilevel inverter prototype hardware is prepared to support the proposed topology to verify the effectiveness and its validity.\",\"PeriodicalId\":14066,\"journal\":{\"name\":\"International Journal of Engineering - Transactions C: Aspects\",\"volume\":\"40 1\",\"pages\":\"851-858\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-11-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Journal of Engineering - Transactions C: Aspects\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.11591/IJEECS.V4.I1.PP41-51\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"Engineering\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Journal of Engineering - Transactions C: Aspects","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.11591/IJEECS.V4.I1.PP41-51","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"Engineering","Score":null,"Total":0}
A Novel Generalized Topology for Multi-level Inverter with Switched Series-parallel DC Sources (RESEARCH NOTE)
This paper presents a novel topology of Single-phase multilevel inverter for low and high power applications. It consists of polarity (Level) generation circuit and H Bridge to generate both positive and negative polarities. The proposed topology can produce more output voltage levels by switching dc voltage sources in series and parallel. The proposed topology utilizes minimum number of power electronic devices which leads to the reduction of cost, size, and weight low and consumes low power which improves the efficiency. Switching pulses are generated using Phase disposition (PD) pulse width modulation technique. Finally the effectiveness of the proposed topology is verified using MATLAB/SIMULINK software tool. 7level asymmetrical multilevel inverter prototype hardware is prepared to support the proposed topology to verify the effectiveness and its validity.