Introduction to the Special Issue on Machine Learning for CAD

The idea of this special issue had stemmed from a workshop that we organized at the Design, Automation, and Test in Europe (DATE) conference in March 2019. The workshop back then aimed at putting the initial seeds for a new research community that collects experts in CAD with a special focus on machine learning (ML) from both industrial as well as academic fields. The workshop later turned into a regular workshop sponsored by IEEE and ACM called MLCAD: http://mlcad.itec.kit.edu, and the first edition was held in September 2019 in Canada. Advances in ML over the past half-dozen years promise to revolutionize the effectiveness of ML in a large variety of domains. However, design processes present challenges that require parallel advances in ML and CAD as compared to traditional ML applications such as image classification. CAD in this context is broadly defined as design-time techniques as well as run-time techniques. In this context, this special issue on ML for CAD focuses on introducing, exploring, and investigating the current as well as future challenges and opportunities when ML and CAD come together. One of the key goals of this special issue is to offer the readers, who are not specialists in ML or may not even have a specific background, a new perspective of the varied ongoing efforts in research that aim at employing ML techniques and algorithms, evolved over decades, in supporting CAD tools. Another goal is to demonstrate to readers how bringing ML and CAD together can open new doors in research toward increasing the efficiency of computing through advanced ML. This holds for both chip design as well as run-time management techniques. In particular, the special issue covers various abstraction layers. It demonstrates how ML does enrich both design-time as well as run-time CAD methodologies to significantly improve their effectiveness. In this special issue, we have 12 interesting articles coving a wide range of different CAD areas. Starting from intelligent methods for chip testing and faults diagnosis, the articles “Toward Smarter Diagnosis: A Learning-Based Diagnostic Outcome Previewer” by Q. Huang et al., “FineGrained Adaptive Testing Based on Quality Prediction” by M. Liu, and “Machine Learning-Based Defect Coverage Boosting of Analog Circuits under Measurement Variations” by N. Xama et al. demonstrate how ML techniques can very effectively increase the yield of chips and help chips’ designers to rapidly identify existing defects in both digital as well as analog circuits. When it comes to FPGA chips, a new method to improve the routability using ML was proposed in “Improving FPGA-Based Logic Emulation Systems through Machine Learning” by H. Szentimrey et al. In addition, A. Agnesina et al. demonstrated the role that ML may play in emulations in their article “Improving FPGA-Based Logic Emulation Systems through Machine Learning.” One of the major challenges that faces designers in the nano-CMOS era is improving the reliability and security of on-chip systems in which the effects of circuit’s aging as well as the threats of adversarial attacks are kept at bay. To this end, “Machine Learning Approach for Fast