一种基于浮栅fet的CMOS可编程模拟存储单元阵列

J. A. Bragg, R. Harrison, P. Hasler, S. DeWeerth
{"title":"一种基于浮栅fet的CMOS可编程模拟存储单元阵列","authors":"J. A. Bragg, R. Harrison, P. Hasler, S. DeWeerth","doi":"10.1109/ISCAS.2000.856066","DOIUrl":null,"url":null,"abstract":"The complexity of analog VLSI systems is often limited by the number of pins on a chip rather than by the die area. Currently, many analog parameters and biases are stored off chip. Moving parameter storage on chip could save pins and allow us to create complex programmable analog systems. In this paper, we present a design for an on-chip non-volatile analog memory cell that can be configured in addressable arrays and programmed easily. We use floating-gate MOS transistors to store charge, and we use the processes of tunneling and pFET hot-electron injection to program values. With these designs, we achieve greater than 13-bit output precision with a 39 dB power supply rejection ratio and no crosstalk between memory cells.","PeriodicalId":6422,"journal":{"name":"2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2000-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A floating-gate pFET based CMOS programmable analog memory cell array\",\"authors\":\"J. A. Bragg, R. Harrison, P. Hasler, S. DeWeerth\",\"doi\":\"10.1109/ISCAS.2000.856066\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The complexity of analog VLSI systems is often limited by the number of pins on a chip rather than by the die area. Currently, many analog parameters and biases are stored off chip. Moving parameter storage on chip could save pins and allow us to create complex programmable analog systems. In this paper, we present a design for an on-chip non-volatile analog memory cell that can be configured in addressable arrays and programmed easily. We use floating-gate MOS transistors to store charge, and we use the processes of tunneling and pFET hot-electron injection to program values. With these designs, we achieve greater than 13-bit output precision with a 39 dB power supply rejection ratio and no crosstalk between memory cells.\",\"PeriodicalId\":6422,\"journal\":{\"name\":\"2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-05-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAS.2000.856066\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2000.856066","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

摘要

模拟VLSI系统的复杂性通常受到芯片上引脚数量的限制,而不是受到芯片面积的限制。目前,许多模拟参数和偏置都存储在芯片外。在芯片上移动参数存储可以节省引脚,并允许我们创建复杂的可编程模拟系统。在本文中,我们提出了一个片上非易失性模拟存储器单元的设计,它可以配置在可寻址阵列中并且易于编程。我们使用浮栅MOS晶体管来存储电荷,并使用隧道和fet热电子注入过程来编程值。通过这些设计,我们实现了大于13位的输出精度,电源抑制比为39 dB,存储单元之间没有串扰。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A floating-gate pFET based CMOS programmable analog memory cell array
The complexity of analog VLSI systems is often limited by the number of pins on a chip rather than by the die area. Currently, many analog parameters and biases are stored off chip. Moving parameter storage on chip could save pins and allow us to create complex programmable analog systems. In this paper, we present a design for an on-chip non-volatile analog memory cell that can be configured in addressable arrays and programmed easily. We use floating-gate MOS transistors to store charge, and we use the processes of tunneling and pFET hot-electron injection to program values. With these designs, we achieve greater than 13-bit output precision with a 39 dB power supply rejection ratio and no crosstalk between memory cells.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信