M. Shulaker, J. V. Rethy, G. Hills, Hong-Yu Chen, G. Gielen, H. Wong, S. Mitra
{"title":"完全使用碳纳米管场效应管构建的全数字电容式传感器接口的实验演示","authors":"M. Shulaker, J. V. Rethy, G. Hills, Hong-Yu Chen, G. Gielen, H. Wong, S. Mitra","doi":"10.1109/ISSCC.2013.6487660","DOIUrl":null,"url":null,"abstract":"This paper presents a complete sensor interface implemented entirely using CNFETs that can be fabricated reproducibly in a VLSI-compatible fashion. This is made possible by using the imperfection-immune paradigm [4], which successfully overcomes major obstacles for CNFET-based circuits: mis-positioned and metallic carbon nanotubes (CNTs). 44 CNFETs, each consisting of 10 to 200 CNTs depending on transistor sizing, are used to build the circuit. In contrast, earlier demonstrations of CNFET-based circuits included only small stand-alone components such as an adder sum, latch, percolation transport-based decoder, and ring oscillator on a single CNT [4]. Because it is easier to implement digital circuits using immature technologies compared to analog circuits, highly-digital sensor interfaces such as the PLL-based design in [5] are ideal implementations when using a new technology. The implemented capacitive sensor interface is based on a first-order Bang-Bang Phase-Locked Loop (BBPLL) digital architecture, which processes the sensor information entirely in the frequency domain (Fig. 6.8.1). Its funcationality is described in detail in [5].","PeriodicalId":6378,"journal":{"name":"2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers","volume":"5 1","pages":"112-113"},"PeriodicalIF":0.0000,"publicationDate":"2013-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"33","resultStr":"{\"title\":\"Experimental demonstration of a fully digital capacitive sensor interface built entirely using carbon-nanotube FETs\",\"authors\":\"M. Shulaker, J. V. Rethy, G. Hills, Hong-Yu Chen, G. Gielen, H. Wong, S. Mitra\",\"doi\":\"10.1109/ISSCC.2013.6487660\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a complete sensor interface implemented entirely using CNFETs that can be fabricated reproducibly in a VLSI-compatible fashion. This is made possible by using the imperfection-immune paradigm [4], which successfully overcomes major obstacles for CNFET-based circuits: mis-positioned and metallic carbon nanotubes (CNTs). 44 CNFETs, each consisting of 10 to 200 CNTs depending on transistor sizing, are used to build the circuit. In contrast, earlier demonstrations of CNFET-based circuits included only small stand-alone components such as an adder sum, latch, percolation transport-based decoder, and ring oscillator on a single CNT [4]. Because it is easier to implement digital circuits using immature technologies compared to analog circuits, highly-digital sensor interfaces such as the PLL-based design in [5] are ideal implementations when using a new technology. The implemented capacitive sensor interface is based on a first-order Bang-Bang Phase-Locked Loop (BBPLL) digital architecture, which processes the sensor information entirely in the frequency domain (Fig. 6.8.1). Its funcationality is described in detail in [5].\",\"PeriodicalId\":6378,\"journal\":{\"name\":\"2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers\",\"volume\":\"5 1\",\"pages\":\"112-113\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-03-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"33\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2013.6487660\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2013.6487660","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Experimental demonstration of a fully digital capacitive sensor interface built entirely using carbon-nanotube FETs
This paper presents a complete sensor interface implemented entirely using CNFETs that can be fabricated reproducibly in a VLSI-compatible fashion. This is made possible by using the imperfection-immune paradigm [4], which successfully overcomes major obstacles for CNFET-based circuits: mis-positioned and metallic carbon nanotubes (CNTs). 44 CNFETs, each consisting of 10 to 200 CNTs depending on transistor sizing, are used to build the circuit. In contrast, earlier demonstrations of CNFET-based circuits included only small stand-alone components such as an adder sum, latch, percolation transport-based decoder, and ring oscillator on a single CNT [4]. Because it is easier to implement digital circuits using immature technologies compared to analog circuits, highly-digital sensor interfaces such as the PLL-based design in [5] are ideal implementations when using a new technology. The implemented capacitive sensor interface is based on a first-order Bang-Bang Phase-Locked Loop (BBPLL) digital architecture, which processes the sensor information entirely in the frequency domain (Fig. 6.8.1). Its funcationality is described in detail in [5].