{"title":"一个40Gb/s PAM4发射机与3分接FSE串行链路系统","authors":"Yan Wang, Qingsheng Hu, Xinyu Song","doi":"10.1109/ICICM54364.2021.9660316","DOIUrl":null,"url":null,"abstract":"This paper presents a 40Gb/s PAM4 transmitter with a 3-tap fractionally-spaced equalizer (FSE) in 65nm CMOS technology. In order to improve the signal quality, a FSE instead of a symbol-space equalizer (SSE) is realized. In addition, the nonlinearity between the high and low bit output current is reduced by employing low-voltage cascode current source. Post simulation result shows that by boosting the high frequency components effectively, PAM4 signals with clear eye-diagram can be obtained at receiver for a channel with 6.45 dB attenuation @10 GHz. The minimum vertical and horizontal opening of the eye diagram is about 154 mVpp and near 0.6UI. The total area of the transmitter is about 705μm × 495μm including I/O pads and the power consumption is about 72mW under 1.2V power supply.","PeriodicalId":6693,"journal":{"name":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"6 1","pages":"417-420"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 40Gb/s PAM4 Transmitter with 3-tap FSE for Serial Link System\",\"authors\":\"Yan Wang, Qingsheng Hu, Xinyu Song\",\"doi\":\"10.1109/ICICM54364.2021.9660316\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a 40Gb/s PAM4 transmitter with a 3-tap fractionally-spaced equalizer (FSE) in 65nm CMOS technology. In order to improve the signal quality, a FSE instead of a symbol-space equalizer (SSE) is realized. In addition, the nonlinearity between the high and low bit output current is reduced by employing low-voltage cascode current source. Post simulation result shows that by boosting the high frequency components effectively, PAM4 signals with clear eye-diagram can be obtained at receiver for a channel with 6.45 dB attenuation @10 GHz. The minimum vertical and horizontal opening of the eye diagram is about 154 mVpp and near 0.6UI. The total area of the transmitter is about 705μm × 495μm including I/O pads and the power consumption is about 72mW under 1.2V power supply.\",\"PeriodicalId\":6693,\"journal\":{\"name\":\"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)\",\"volume\":\"6 1\",\"pages\":\"417-420\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-10-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICM54364.2021.9660316\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICM54364.2021.9660316","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
本文介绍了一种采用65nm CMOS技术的40Gb/s PAM4发射机,该发射机具有3分路分数间隔均衡器(FSE)。为了提高信号质量,采用FSE代替符号空间均衡器(SSE)。此外,通过采用低压级联电流源,降低了高低位输出电流之间的非线性。后置仿真结果表明,通过对高频分量的有效增强,可以在接收机处获得具有清晰眼图的PAM4信号,信道衰减为6.45 dB @10 GHz。眼图的最小垂直和水平开口约为154 mVpp,接近0.6UI。包括I/O垫在内,发射机的总面积约为705μm × 495μm,在1.2V电源下,功耗约为72mW。
A 40Gb/s PAM4 Transmitter with 3-tap FSE for Serial Link System
This paper presents a 40Gb/s PAM4 transmitter with a 3-tap fractionally-spaced equalizer (FSE) in 65nm CMOS technology. In order to improve the signal quality, a FSE instead of a symbol-space equalizer (SSE) is realized. In addition, the nonlinearity between the high and low bit output current is reduced by employing low-voltage cascode current source. Post simulation result shows that by boosting the high frequency components effectively, PAM4 signals with clear eye-diagram can be obtained at receiver for a channel with 6.45 dB attenuation @10 GHz. The minimum vertical and horizontal opening of the eye diagram is about 154 mVpp and near 0.6UI. The total area of the transmitter is about 705μm × 495μm including I/O pads and the power consumption is about 72mW under 1.2V power supply.