使用标准ASIC库元素、工具和设计方法设计高速串行端口

Paul Freud
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引用次数: 1

摘要

本文介绍了一种使用标准ASIC库、工具和设计方法的高速串行端口设计方法。利用现有的后端ASIC工具和技术,我们能够放置、路由和验证运行速度高达622 Mb/s的串行链路。我们的方法已经在多个芯片上实现,并通过Spice与静态时序分析的详细比较进行了验证。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Designing high-speed serial ports using standard ASIC library elements, tools and design methodologies
This paper describes a high-speed serial port design approach which uses standard ASIC libraries, tools and design methodologies. Leveraging existing backend ASIC tools and technology enabled us to place, route, and verify serial links running up to 622 Mb/s. Our approach has been implemented on multiple chips and validated with a detailed comparison of Spice to static timing analysis.
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