{"title":"软件无线电多相分解信道器","authors":"W. Yung, Min Jian, Yew Wee Ho","doi":"10.1109/ISCAS.2000.856334","DOIUrl":null,"url":null,"abstract":"Due to the relatively high data rate and the intensive filter operations involved, it is difficult to implement software defined radio functions on a general purpose processor for the channelizer in the base station receiver. This paper presents an efficient channelizer design based on the polyphase decomposition technique. The channelizer was modelled and comparison was made with conventional designs. In terms of the number of arithmetic operations per second, the new model had shown a 130/spl times/ improvement. This paper presents a more realistic outlook of the design improvement taking the algorithm complexities into account as well.","PeriodicalId":6422,"journal":{"name":"2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)","volume":"3 1","pages":"353-356 vol.2"},"PeriodicalIF":0.0000,"publicationDate":"2000-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Polyphase decomposition channelizers for software radios\",\"authors\":\"W. Yung, Min Jian, Yew Wee Ho\",\"doi\":\"10.1109/ISCAS.2000.856334\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Due to the relatively high data rate and the intensive filter operations involved, it is difficult to implement software defined radio functions on a general purpose processor for the channelizer in the base station receiver. This paper presents an efficient channelizer design based on the polyphase decomposition technique. The channelizer was modelled and comparison was made with conventional designs. In terms of the number of arithmetic operations per second, the new model had shown a 130/spl times/ improvement. This paper presents a more realistic outlook of the design improvement taking the algorithm complexities into account as well.\",\"PeriodicalId\":6422,\"journal\":{\"name\":\"2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)\",\"volume\":\"3 1\",\"pages\":\"353-356 vol.2\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-05-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAS.2000.856334\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2000.856334","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Polyphase decomposition channelizers for software radios
Due to the relatively high data rate and the intensive filter operations involved, it is difficult to implement software defined radio functions on a general purpose processor for the channelizer in the base station receiver. This paper presents an efficient channelizer design based on the polyphase decomposition technique. The channelizer was modelled and comparison was made with conventional designs. In terms of the number of arithmetic operations per second, the new model had shown a 130/spl times/ improvement. This paper presents a more realistic outlook of the design improvement taking the algorithm complexities into account as well.