A CPFSK/PSK-phase reconstruction-receiver for enhanced data rate Bluetooth systems

A well-established receiver concept for wireless systems, e.g. according to the Bluetooth specification, is based on a low IF-architecture with a simple limiter used for digitization. This architecture can be applied with negligible performance degradation to simple 2-ary modulation schemes with constant envelope signals like GFSK. In order to achieve higher data rates, the wireless standards are enhanced with additional modes using more sophisticated modulation schemes like M-ary PSK. With respect to implementation costs and power consumption, it is desirable to realize a combined CPFSK/PSK-receiver, which performs digitization by simple comparators or 1-bit A/D-converters also for the higher data rate schemes. However, no severe performance degradation compared to a linear receiver can be accepted. In this contribution, it is shown how to achieve the required performance with a simple limiter in the receive path and optimized signal processing before and after quantization.