基于时模米勒补偿(TMMC)的高效率DC-DC变换器

2012 Symposium on VLSI Circuits (VLSIC) Pub Date : 2012-06-13 DOI:10.1109/VLSIC.2012.6243849

Sung-Wan Hong, Tae-Hwang Kong, Seungchul Jung, Sungwoo Lee, Se-Won Wang, Jong-Pil Im, G. Cho

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引用次数: 4

摘要

针对DC-DC变换器的控制器设计，本文引入了时模米勒补偿(TMMC)。利用这一概念，可以大大减少DC-DC转换器的消耗面积，而无需任何片外补偿元件。芯片采用0.18μm I/O CMOS实现，其尺寸与0.35μm CMOS相似，本作品的核心尺寸仅为0.12mm2。峰值效率为90.6%，开关频率为1.15MHz。

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High area-efficient DC-DC converter using Time-Mode Miller Compensation (TMMC)

For the controller design of a DC-DC converter, a Time-Mode Miller Compensation (TMMC) is introduced in this paper. Using this concept, the consuming area of the DC-DC converter can be significantly reduced without any off-chip compensation components. The chip is implemented in 0.18μm I/O CMOS whose size is similar to 0.35μm CMOS, and the core size of this work is only 0.12mm2. Peak efficiency is 90.6%, with switching frequency of 1.15MHz.

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2012 Symposium on VLSI Circuits (VLSIC)

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