Deriving homing sequences for Finite State Machines with timeouts

State identification is the well-known problem in the automata theory that is aimed to determining the current or initial state of a system under test and this fact is widely used in the model-based testing of software and hardware systems. When modern systems are modeled, it is necessary to take into account the timed aspects and for this reason classical Finite State Machines (FSM) are extended by clock variables. In this work, we study the homing problem for FSMs with timeouts (TFSM). For this purpose, we introduce the notion of a timed homing sequence (HS) that is different from that for classical FSMs and propose a method for checking the existence and deriving a timed HS if it exists. A proposed method is based on the FSM abstraction of a TFSM, i.e. on a classical FSM that partially describes the behavior of a corresponding TFSM and inherits many of its properties. Since timeouts allow the system to move from state to state without input impact, we define a timed HS as a sequence that sets a TFSM to a stable state where the system can stay infinitely long waiting for an input.