用于嵌入式应用的0.9 V, 4k SRAM

Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference Pub Date : 1996-05-05 DOI:10.1109/CICC.1996.510525

J. Caravella

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引用次数: 6

摘要

提出了一种4 Kb SRAM设计，在0.9伏电源电压下，功能为12 MHz, RMS运行功率(1 MHz)为22 /spl mu/W。在1.6伏电源电压下，电路的最大工作频率为38mhz，平均运行功率(1mhz)为32 /spl mu/W。该设计采用子阻塞阵列架构以及选择性使用基于NOR/NAND的解码逻辑。感应放大器的设计是一个低电压，无故障的设计，以节省电力。

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A 0.9 V, 4 K SRAM for embedded applications

A 4 Kb SRAM design is presented with functionality of 12 MHz at a supply voltage of 0.9 volts with a RMS run power (1 MHz) of 22 /spl mu/W. The circuit operates at maximum frequency of 38 MHz at a supply voltage of 1.6 volts with a RMS run power (1 MHz) of 32 /spl mu/W. The design utilizes a sub-blocked array architecture as well as selective use of NOR/NAND based decode logic. The sense amplifier design is a low voltage, glitch-free design to conserve power.

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来源期刊

Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference

CiteScore

3.80

自引率

0.00%

发文量