一个采用SOTB CMOS技术的0.8V 14位62.5kSPS非二进制循环ADC

2019 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS) Pub Date : 2019-12-01 DOI:10.1109/ISPACS48206.2019.8986371

Shuichiro Yamada, Toshiki Ohtsu, M. Sasaki, H. San, T. Matsuura, M. Hotta

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引用次数: 0

摘要

本文提出了一种用于高分辨率循环模数转换器(ADC)的低电源电压电路技术的概念验证。利用SOTB CMOS衬底电压控制技术，可以在低至Vdd= 0.8V的电源电压下实现高分辨率的循环ADC。采用65nm SOTB CMOS技术设计并制作了一个14位循环ADC原型。测量的DNL=-0.80/1.11LSB, INL=-5.05/3.49LSB，当7.81kHz正弦输入以62.5ksps采样时。

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A 0.8V 14bit 62.5kSPS non-binary cyclic ADC using SOTB CMOS technology

This paper presents a proof-of-concept of the low supply voltage circuit technique for high resolution cyclic analog-to-digital converter (ADC). By utilizing substrate-voltage-control technique for SOTB CMOS, high resolution cyclic ADC can be realized at supply voltage as low as Vdd= 0.8V. A prototype 14bit cyclic ADC is designed and fabricated in 65nm SOTB CMOS technology. Measured DNL=-0.80/1.11LSB, INL=-5.05/3.49LSB are achieved while a 7.81kHz sinusoidal input is sampled at 62.5ksps.

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2019 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)

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