A Low-resource and Scalable Strategy for Segment Partitioning of Many-core Nano Networks

In this work we introduce the design and implementation of DiSR, a distributed approach to topology discovery and defect mapping in nanoscale network-on-chip scenario. We first describe the conceptual elements and the execution model of DiSR, showing how the open-source Nanoxim platform has been used to evaluate the proposed approach in terms of node coverage and scalability achieved when establishing a segment partitioning. Next, in order to demostrate the feasibility of the proposed strategy in the context of the limited node resources, we propose both a schematic and gate-level hardware implementation of the required control logic and storage. Results show a relatively acceptable impact, ranging from 10 to about 20% of the 10,0000 transistors budget available for each node.