毫米波波段的紧凑CMOS单端平衡带通滤波器

Yi-Ming Chen, Shih-Cheng Lin, Sheng-Fuh Chang, Hsin-Yen Yang
{"title":"毫米波波段的紧凑CMOS单端平衡带通滤波器","authors":"Yi-Ming Chen, Shih-Cheng Lin, Sheng-Fuh Chang, Hsin-Yen Yang","doi":"10.1109/MWSYM.2017.8058893","DOIUrl":null,"url":null,"abstract":"This paper presents a compact 55–65 GHz single-ended-to-balanced bandpass filter in CMOS technology. The bandpass filters is designed based on three-line stepped-impedance resonator to obtain differential output phases. The stepped-impedance open stub is incorporated to generate stopband transmission zero. To meet the stringent chip area restriction in CMOS realization, the grounded pedestal structure is adopted by fully utilizing the multiple metal layer feature. The measured insertion loss is less than 4.7 dB and the return loss is larger than 9 dB in 55–65 GHz. The power imbalance is less than 0.7 dB and the phase imbalance is less than 2°. The chip size without pad is 0.293×0.136 mm2, equivalent to 0.007 Ig2.","PeriodicalId":6481,"journal":{"name":"2017 IEEE MTT-S International Microwave Symposium (IMS)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A compact CMOS single-ended-to-balanced bandpass filter in millimeter-wave band\",\"authors\":\"Yi-Ming Chen, Shih-Cheng Lin, Sheng-Fuh Chang, Hsin-Yen Yang\",\"doi\":\"10.1109/MWSYM.2017.8058893\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a compact 55–65 GHz single-ended-to-balanced bandpass filter in CMOS technology. The bandpass filters is designed based on three-line stepped-impedance resonator to obtain differential output phases. The stepped-impedance open stub is incorporated to generate stopband transmission zero. To meet the stringent chip area restriction in CMOS realization, the grounded pedestal structure is adopted by fully utilizing the multiple metal layer feature. The measured insertion loss is less than 4.7 dB and the return loss is larger than 9 dB in 55–65 GHz. The power imbalance is less than 0.7 dB and the phase imbalance is less than 2°. The chip size without pad is 0.293×0.136 mm2, equivalent to 0.007 Ig2.\",\"PeriodicalId\":6481,\"journal\":{\"name\":\"2017 IEEE MTT-S International Microwave Symposium (IMS)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE MTT-S International Microwave Symposium (IMS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSYM.2017.8058893\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE MTT-S International Microwave Symposium (IMS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSYM.2017.8058893","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

摘要

本文提出了一种基于CMOS技术的55-65 GHz单端平衡带通滤波器。设计了基于三线步进阻抗谐振器的带通滤波器,以获得差分输出相位。采用了阶跃阻抗开路短段来产生阻带传输零。为了满足CMOS实现中严格的芯片面积限制,充分利用多金属层特性,采用接地底座结构。在55 ~ 65 GHz范围内,测量到的插入损耗小于4.7 dB,回波损耗大于9db。功率不平衡小于0.7 dB,相位不平衡小于2°。无衬垫的芯片尺寸为0.293×0.136 mm2,相当于0.007 Ig2。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A compact CMOS single-ended-to-balanced bandpass filter in millimeter-wave band
This paper presents a compact 55–65 GHz single-ended-to-balanced bandpass filter in CMOS technology. The bandpass filters is designed based on three-line stepped-impedance resonator to obtain differential output phases. The stepped-impedance open stub is incorporated to generate stopband transmission zero. To meet the stringent chip area restriction in CMOS realization, the grounded pedestal structure is adopted by fully utilizing the multiple metal layer feature. The measured insertion loss is less than 4.7 dB and the return loss is larger than 9 dB in 55–65 GHz. The power imbalance is less than 0.7 dB and the phase imbalance is less than 2°. The chip size without pad is 0.293×0.136 mm2, equivalent to 0.007 Ig2.
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