使用Gröbner碱基进行等价性检查

Amr A. R. Sayed-Ahmed, Daniel Große, Mathias Soeken, R. Drechsler
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引用次数: 23

摘要

由于最近代数计算技术在大型优化门级乘法器的形式化验证中取得了成功,本文提出了包含复杂算术组件和控制逻辑的处理电路的代数等效检验。这些电路对现有的证明技术提出了重大挑战。代数组合等价检验(ACEC)的基本思想是将两个比较电路以Gröbner基的形式建模,并将它们组合成一个代数模型。它在两个电路的内部变量之间生成位和字的候选关系,并在组合模型中测试它们的隶属关系。由于成员测试不能扩展到所描述的设置,我们提出了逆向工程来提取算术组件并将其抽象为规范表示。在此基础上,我们提出了一种算法扫描,利用抽象的元件来寻找和证明两个电路之间的内部等价。我们演示了ACEC在检查浮点乘法器(包括完整的IEEE-754舍入方案)对几种优化和多样化实现的等效性方面的适用性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Equivalence checking using Gröbner bases
Motivated by the recent success of the algebraic computation technique in formal verification of large and optimized gate-level multipliers, this paper proposes algebraic equivalence checking for handling circuits that contain both complex arithmetic components as well as control logic. These circuits pose major challenges for existing proof techniques. The basic idea of Algebraic Combinational Equivalence Checking (ACEC) is to model the two compared circuits in form of Gröbner bases and combine them into a single algebraic model. It generates bit and word relationship candidates between the internal variables of the two circuits and tests their membership in the combined model. Since the membership testing does not scale for the described setting, we propose reverse engineering to extract arithmetic components and to abstract them to canonical representations. Further we propose arithmetic sweeping which utilizes the abstracted components to find and prove internal equivalences between both circuits. We demonstrate the applicability of ACEC for checking the equivalence of a floating point multiplier (including full IEEE-754 rounding scheme) against several optimized and diversified implementations.
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