用于可重构结构的非算术进位链

Michael T. Frederick, Arun Kumar Somani
{"title":"用于可重构结构的非算术进位链","authors":"Michael T. Frederick, Arun Kumar Somani","doi":"10.1109/ICCD.2007.4601892","DOIUrl":null,"url":null,"abstract":"Reconfigurable fabrics cater to a wide variety of applications, but have adopted specialized components to allow efficient implementation of performance-critical arithmetic operations. Carry chains have been integrated into the fabric typically as an optimized ripple-carry chain. However, in non-arithmetic operations the carry chain goes unused, when it could be a valuable adjacent-cell interconnect resource. This paper presents a cell architecture facilitating reuse, as well as an analysis of the potential benefits of reuse for an sampling of common of algorithms using commercial FPGAs. Technology map experiments indicate that a variety of applications can benefit from reuse, with utilized routing resources reduced by up to 13% and maximum clock frequency increased by up to 47%.","PeriodicalId":6306,"journal":{"name":"2007 25th International Conference on Computer Design","volume":"45 1","pages":"137-143"},"PeriodicalIF":0.0000,"publicationDate":"2007-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Non-arithmetic carry chains for reconfigurable fabrics\",\"authors\":\"Michael T. Frederick, Arun Kumar Somani\",\"doi\":\"10.1109/ICCD.2007.4601892\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Reconfigurable fabrics cater to a wide variety of applications, but have adopted specialized components to allow efficient implementation of performance-critical arithmetic operations. Carry chains have been integrated into the fabric typically as an optimized ripple-carry chain. However, in non-arithmetic operations the carry chain goes unused, when it could be a valuable adjacent-cell interconnect resource. This paper presents a cell architecture facilitating reuse, as well as an analysis of the potential benefits of reuse for an sampling of common of algorithms using commercial FPGAs. Technology map experiments indicate that a variety of applications can benefit from reuse, with utilized routing resources reduced by up to 13% and maximum clock frequency increased by up to 47%.\",\"PeriodicalId\":6306,\"journal\":{\"name\":\"2007 25th International Conference on Computer Design\",\"volume\":\"45 1\",\"pages\":\"137-143\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 25th International Conference on Computer Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCD.2007.4601892\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 25th International Conference on Computer Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.2007.4601892","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

摘要

可重构结构迎合了各种各样的应用程序,但采用了专门的组件来允许高效地实现性能关键的算术运算。Carry链通常作为优化的波纹Carry链集成到织物中。然而,在非算术运算中,当进位链可能是一个有价值的邻接单元互连资源时,它是不被使用的。本文提出了一种促进重用的单元结构,并分析了使用商用fpga的通用算法采样的重用的潜在好处。技术地图实验表明,各种应用程序都可以从重用中受益,所利用的路由资源最多减少13%,最大时钟频率最多增加47%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Non-arithmetic carry chains for reconfigurable fabrics
Reconfigurable fabrics cater to a wide variety of applications, but have adopted specialized components to allow efficient implementation of performance-critical arithmetic operations. Carry chains have been integrated into the fabric typically as an optimized ripple-carry chain. However, in non-arithmetic operations the carry chain goes unused, when it could be a valuable adjacent-cell interconnect resource. This paper presents a cell architecture facilitating reuse, as well as an analysis of the potential benefits of reuse for an sampling of common of algorithms using commercial FPGAs. Technology map experiments indicate that a variety of applications can benefit from reuse, with utilized routing resources reduced by up to 13% and maximum clock frequency increased by up to 47%.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信